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IP/SOC Design Methodology and Flows Engineer

Bengaluru, India Job ID JR0232958 Job Category Engineering Work Mode Hybrid Experience Level Experienced
Job Description
The PSG Structured ASIC Engineering Group (PSAE) within Intel Programmable Solutions Group is seeking exceptional talent for an IP SoC FE Design Methodology and Flows Engineer to work with a diverse team designing Intel next generation Custom Structured ASIC (Intel eASIC) based SOCs and Customer Design solutions - someone who is passionate to improve the way we solve complex problems through teamwork or direct contributions. The IP Solutions team within PSAE is responsible for delivering IP-solutions for Customer designs on Structured ASIC (eASIC) demonstrating high quality RTL development, IP delivery and integration into SOCs, verification with all the IP Quality checks and Physical Convergence with the Structured ASIC device architecture and technology. We are looking for a talented Front End Design Methodology Engineer to join our team. In this position, you will work on RTL design, integration and quality checks related flows across clusters, IP, Subsystems, SOCs. You will rapidly take features from concept to production and provide customer support, debug failures, and provide out of the box solutions. Responsibilities: � Understand and enhance the frontend design flows and methodologies across IPs and SOCs to identify key areas of improvement � Provide user friendly solutions, to increase productivity of team � Identify, define and publish the best practices for the various aspects related to RTL development, IP delivery, SOC integration, quality checks and back-end handoff � Influence project execution and methodology while working with both external and internal tool vendors. � Develop and deploy highly productive and robust build, run, and flow management environments and systems. � Develop and deploy scripts and automations to assist the design and validation teams. � Develop, deploy and mentor tool usage methodologies.
Qualifications
� Bachelor or Master's degree in Computer Science, Electrical or Computer Engineering or related degree. � 3+ Years of experience with system Verilog and familiarity with a range of internal and 3rd-party logic design tools � 3+ years of experience in FE development flows and tools (Verilog design language, VCS, SpyGlass etc.) � 3+ years developing enterprise-class programs, scripts and systems
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

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Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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