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Analog Design Engineer (High Speed IO Design) - Returnship

Bengaluru, India Job ID JR0231742 Job Category Contract Employee Work Mode Hybrid Experience Level Contract
Job Description
Have you taken a career break and are now interested in returning to the workforce? Intel is offering a 20-week paid returnship for experienced professionals ready to return to the workforce. If you have at least 3 years of professional experience and have taken a career break for 2+ years for any of the following, but not limited to reasons we welcome, you to apply: � Starting or raising a family � Military service/military spouse � Community service/volunteer work � Caring for a family member or self � Teaching � Other At Intel we are excited to have a Return-to-Work program because we appreciate the skills individuals who are returning to work can offer. Through this program you will have the opportunity to revamp your skills, update your resume with new skills and experiences as well as make connections with others transitioning back into the workforce. This position is hybrid in Bangalore during the 20-week returnship program. You will be joining an expanding High speed IO team involved in design and development on cutting-edge Intel and external foundry process development nodes. As the Analog Design Engineer you will be responsible for but not limited to working on circuit design, validation, layout review, mixed signal validation, and reliability validation. The candidate Should have experience of designing high speed IO circuits such as transmitter, receiver, clocking, PLL, DLL, Tx, Rx, DDR, SerDes, LPDDR, DDR, HBM) etc. Strong fundamentals of CMOS design, passive RC circuits, high circuit design concept are a must for this role. The candidate should also have exposure to high-speed digital circuit design and analysis with timing and flow closure along with digitally assisted analog circuit and techniques. The candidate will be responsible for the high speed, low power, and reliable analog and digital circuits for various areas of high-speed IO design and should have a good knowledge of control systems, band gaps, bias, op-amps, LDOs, feedback and compensation techniques.
Qualifications
You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship. Minimum Qualifications � Candidates must have taken a career break for 2 or more years. � Candidates must have a minimum of 3 Years of professional experience in Analog Circuit Design � Candidate should possess a Master of Science degree in Electrical Engineering or equivalent � Strong academic background required in CMOS semiconductor device physics and silicon processing. � Relevant coursework in CMOS digital, analog, and I/O circuit design Knowledge of transistor-level circuit simulation tools such as SPICE Preferred Qualifications � Familiarity with CMOS transistor and semiconductor device layout methods. � Experience using custom design environments such as Cadence design automation tools (ADS, Analog Artist, or Virtuoso) Knowledge of DRC, LVS, and post-layout extraction tools
Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.


Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

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Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

  • CAD Engineer - Returnship Multiple Locations Apply Now
  • CAD Engineer - Returnship Multiple Locations Apply Now
  • CAD Engineer - Returnship Multiple Locations Apply Now
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