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Senior Foveros (advanced packaging) Die Prep Process Engineer

Albuquerque, New Mexico Job ID JR0233963 Job Category Engineering Work Mode Hybrid Experience Level Experienced
Job Description

The New Mexico Disaggregated Manufacturing Organization (NM DMO) is growing rapidly as it brings Foveros HVM (High Volume Manufacturing) to life under a single organization with all segments of the process co-located at a single campus for the first time.

As part of this exciting growth opportunity, the Fab 9 Foveros organization is seeking Process Engineers to join our team as key contributors to our startup and ramp into HVM for Die Prep area with the specific of the wafer Thinning, Die singulation and Die Pick and Place technologies
In this role, you will contribute to startup and ramp into high-volume production for all aspects of your assigned module, including safety, quality, output, cost, and labor productivity.

Specific contributions will include but are not limited to:

  • Own and improve process, equipment hardware, software, and applications systems to enhance the quality, reliability, and manufacturability of processes and equipment.

  • Identify, respond to, and characterize process and equipment defect/quality problems, defining root cause and implementing solutions to those problems, keeping high standard of safety, quality, velocity, and cost performance.

  • Partner with the Fab 9 Foveros New Mexico transfer team for process startup (tool install and qualification) and transfer to a ramping phase, and eventually to High Volume Manufacturing (HVM).

  • Interact with partner factories worldwide to transfer new processes, maintain Copy Exactly parameters, share learnings, and drive improvements.

  • Partnering with the Manufacturing Department to assist technicians with their technical development.

  • Technical expert in one or more areas in die-preparation for semiconductor packaging such as wafer thinning and dicing /Die singulation (Laser, saw, grind)/Die pick and place semiconductor processes.

  • Strong knowledge in understanding the die failure mechanisms and models of die preparation technology for advance semiconductor packaging.

The ideal candidate should exhibit the following behavioral traits:

  • Ability to communicate effectively both verbally and in writing.

  • Strong analytical and problem-solving skills.

  • Evidence of team leadership and team building capability.

  • Evidence of the ability to make technical decisions and provide technical direction.

  • Demonstration of initiative and comfortable working in a factory and/or lab environment on a regular basis.


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Candidate must possess a B.S., Masters or Ph.D. degree in an Engineering and/or Science discipline such as Physics, Applied Physics, Chemistry, Materials Science, Chemical Engineering, Mechanical Engineering, or Electrical Engineering or Related STEM degree.

  • 2+ years' experience (M.S. or Ph.D.) or 5+ years of experience (B.S.) in semiconductor packaging (die prep) process and/or equipment


Preferred Qualifications:

  • 5+ year in statistical process control techniques, data analysis, and model-based problem solving.

  • 3+ years of experience in the following areas: Die singulation/Laser-materials interactions/Die failure mechanism/Die pick and place or Advanced semiconductor packaging experience.


Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.


Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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