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Senior Chipsets Logic Design Engineer

Malaysia; Kulim, Malaysia Job ID JR0237275 Job Category Engineering Work Mode Hybrid

Job Description

Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLT is part of the Chipsets Silicon Group, CSG within Design Engineering Group, DEG and is responsible for developing soft IPs, subsystems and gaskets for client and server chipsets.

This job requisition is to seek an experienced, disciplined and collaborative Logic Design Engineer, responsibilities including but not limited to:

- Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate functional unit, soft IP block, and subsystems for inclusion in full chip designs;

- Applies various strategies, tools and methods to qualify the design for lint, synthesizability, DFx, clock and reset domain crossing check, synthesizability check to meet design QoR, timing constraint definition and review gate count, power optimization, etc;

- Participates in the development of Architecture and Microarchitecture specifications for the Logic components;

- Reviewing verification plan and implementation to ensure the design features are verified correctly;

- Provides IP integration support to SoC customers and represents RTL team.

Excellent communication and organization skills are critical, along with teamwork, and must demonstrate strong technical leadership skills, passion for design, tools and methodology and strong influencing skills.

Candidate must have strong orientation for Quality, Commit and Deliver, drive Innovation and efficiencies, and have strong strategic thinking to come up with paradigm shift solutions to critical design and validation challenges.

You are
- An excellent communicator
- Extremely organized
- A team player who loves to collaborate
- A strong technical leader who communicates well with great influencing skills
- Passionate for design, tools and methodology
- Someone who meets their commitments
- Motivated
- Self driven
- Someone who wants to make a difference through technology
- People who want to do innovative things

We are
- Open to new ideas and methodologies
- A collaborative team demonstrating the best teamwork across Intel
- Here to help you succeed

If your skillsets align with our needs we will provide you a great path to maximize your positive impact on the world.


The candidate should have successful track record of hardware development experience and demonstrated technical leadership skills.

The candidate must have the ability to solve highly complex technical problems with excellent communication skills.

The candidate must have strong ethical standards. Must also be able to perform in a highly ambiguous and dynamic business environment.

Minimum Qualifications
� BS or MS in Electrical Engineering, Computer Engineering, Computer Science or equivalent.
� Min 5 years of experience in IP Logic design, development and delivery.
� Expertise in Verilog and System Verilog based logic design.
� Experience in design tools/standards/simulators, for instance UPF, Lint, Spyglass CDC, Design Compiler or VCS.

It'll be a plus if candidate has following:
� Knowledge of SVA.
� Domain knowledge of low power design flows and techniques.
� Knowledge of industry standard protocols like PCIe and AMBA.
� Familiarity with x86 architecture.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations


Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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