Design Technology Platform Intern

Job Description

The Advanced Design (AD) team within Design Technology Platform (DTP) organization is looking for talented individuals to work in Memory Design or ASIC Auto Place and Route (APR) block Design Technology Co-Optimization (DTCO) domain. At Intel, Design Technology Platform (DTP) is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies. As part of the AD team, you will join a highly motivated team of talented engineers performing all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create an optimal design OR focusing on pathfinding and development of advanced memory technology and circuits to enable best-in-class memory collateral/IP and product design. Your responsibilities include although not limited to: - Support RTL synthesis and place and route experiments using internal and external vendor tools to improve Intel's product Power, Performance, and Area. - Deal with changes in floorplan, corresponding scaling, and its impact to power, congestion, and timing for the present technology node and predict how it would impact the scaling of power, routing and timing for the next technology node. - Help improve cell utilization and transistor density metrics by leveraging leading edge tools and methodologies. - Able to analyze power (dynamic and leakage), performance (setup and hold), improve critical path timing, find ways to reduce congestion by making best use of available metal layers, debug tools and more. - Memory pathfinding activities and power performance area (PPA) optimization through design technology co-optimization (DTCO); product/design enablement. - Memory bitcell and complex periphery IC layout and automation. - Memory array/IP design, memory circuit innovation, testchip design/execution/validation. - Pre/post-Si validation/debug to enable yield and parametric tracking/ramp.-

Qualifications

Qualifications You must possess the below minimum qualifications to be initially considered for this position: - Pursuing a Bachelor degree in Electrical/Electronics Engineering, Computer Engineering, Computer Science, or other related Electrical Scientific STEM field with good CGPA. - Good communication skills and proficient in English. - Knowledge on Unix, TCL/Per/Python/Ruby programming. #designenablement

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.