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Chipsets Logic Design Micro Architect

Penang, Malaysia| Kulim, Kedah, Malaysia Job ID JR0244690 Job Category Engineering Work Mode Hybrid Experience Level Experienced
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Job Description


Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team is part of the Chipsets Silicon Group (CSG) within Design Engineering Group and is responsible for developing Soft IPs, Subsystems and Gaskets for client and server products. As a Chipsets Logic Design Micro Architect, a typical day may include but is not limited to: - Developing Microarchitecture specifications and participating development of Architecture specifications for the Logic components, subsystem with SIP/HIP interoperability validation - Performing logic design Register Transfer Level (RTL) coding and formal verification - Providing IP integration support to SoC customers and represents RTL team - Performing tools and flows to qualify the logic implemented such as RTL, DFx, linting, clock and reset domain crossing check, synthesizability check to meet design QoR, timing constraint definition and review gatecount, power optimization, etc - Reviewing verification plan and implementation to ensure the design features are verified correctly You are: - An excellent communicator - Extremely organized - A team player who loves to collaborate - Passionate for design/tools and methodology - Someone who meets their commitments - Motivated - Self-driven - Someone who wants to make a difference through technology We are: - Open to new ideas and methodologies - A collaborative team demonstrating the best teamwork across Intel - Here to help you succeed - People who want to do innovative things If your skillsets align with our needs, we will provide you a great path to maximize your positive impact on the world.

Qualifications


Minimum Qualifications: - Possess a degree in Electronics Engineering, Computer Engineering, Computer Science, or equivalent and experience with IP/SoC design or validation development. - Bachelor with at least 7 years of experience OR - Master with at least 5 years of experience OR - Doctorate with at least 3 years of experience. Candidate with aspiration to develop career path in IP architecture/micro-architecture is encouraged to apply. The candidate should be: - Strong technical leader who communicates well with great influencing skills. - Strong analysis, debugging skills, and creative in problem solving. - Motivated, Self-driven and Independent - Someone who wants to make a difference through technology while having FUN Additional Qualifications: - Experience in any of these areas: --- Power Management --- Design For Test/Verification (DFT/DFV/DFX) --- Any industry standard device Or interface protocol. --- Experience with UFS, I3C, I2C, SPI, USB, PCI-Express will be big plus - Experience in these design tools and methodologies: --- RTL model build and simulation --- Verification with System Verilog (OVM/UVM) --- Scripting (Python/Perl/Shell) --- power-aware design and simulation --- physical implementation with synthesis tools --- HW/SW, digital/analog inter-operability --- clock / reset domain crossing design and verification

Inside this Business Group


In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations



MY, Kulim


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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