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EDA Tools Software Engineer

Hillsboro, Oregon Job ID JR0233212 Job Category Engineering Work Mode Hybrid Experience Level Entry Level
Job Description

As an EDA Tools Software Engineer in the Lead Vehicle (Test Chip) Development group, you will be responsible for the development of physical design automation tools, flows, methodologies, and processes to support design of Intel's next generation process technology and yield test chips.

Your responsibilities will include, but not limited to:

  • Development of EDA software tools and flows that automate generation of E-Test structure devices, routing, layout dummification, and physical design verification
  • Development of Design Rule Check (DRC) run-set software to implement test structure process design rules
  • Development and support of test chip layout library for the latest process nodes
  • Collaborating with semiconductor process technologists to define test structure designs
  • Troubleshoot design and DRC verification issues with complex physical design flows and tools

About the team and organization:

Intel's Lead Vehicle Development (LVD) Team is one component of the larger Design Enablement (DE) organization, that provides design and manufacturing services to a variety of internal and external customers who leverage Intel's holistic design and manufacturing expertise to deliver unique circuits and systems at the leading edge of the technology curve. LVD's mission is to develop test-chips and other hardware prototypes that enable our customers to use Intel's most advanced process technologies to develop innovative products and reduce their time-to-market.


Minimum Qualifications:

  • Master's OR Ph.D. degree in Electrical Engineering (EE or ECE or ECSE), Computer Engineer (CE), Computer Science (CS), or related engineering discipline
  • 6+ months experience in the following at graduate school research, projects or from previous jobs: Programming and scripting languages such as Python, Tcl, or C++; Working with UNIX/Linux computer platforms
  • Understanding of layout design rules, CMOS physical layout design, VLSI test circuits, device physics and semiconductor processing

Preferred Qualifications:

  • Experience with industry standard EDA tools such as Cadence Virtuoso, Synopsys ICV, Siemens Calibre for use in physical design, place and route scripts, and DRC verification
  • Development of parameterized cells (PCells using Cadence SKILL) or PyCell.

Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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