Design Rule Engineer
As a member of the Design Rule Definition Group, you will be at the forefront of co-optimizing Intel's state-of-the-art process technology with diverse design needs in order to enable best-in-class products in a data-centric world. Tech Definition and Modeling Team serves as the design interface with the process development team, working out key design/process interactions for all new Intel processes. You will be responsible for defining, analyzing and driving Intel's logic design rules in a robust and efficient manner.
Your responsibilities may include:
- Work with the process, device, EDA vendors and design teams to co-optimize the process technology and layout design rules to enable TD technology certification vehicle as well as products.
- Analyze, develop and drive new methodologies, experiments and test structures on silicon to represent critical product patterns for faster yield learning.
- Analyze cross-technology design rules to achieve maximum reuse and faster cycle time.
- Develop methodologies to achieve consistency and efficiency in the design rule definition process as well as testing methodology.
This is an entry-level position and compensation will be given accordingly.
You must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Knowledge and/or experience listed below would be obtained through a combination of your school work and/or classes and/or research and/or relevant previous job and/or internship experiences .
Candidate must possess an MS degree with 6+ months of experience or a PhD degree with 1+ years of experience in Electrical or Computer Engineering or Physical Science.
Must have the required degree or expect the required degree by the start date.
6+ months of experience in one of the following:
- Module Process development and/or process integration
- Technology design rules interactions
- Digital, high-speed VLSI design
- Physical design, fill and layout completion or full chip integration
- Semiconductor device physics
- Layout manipulation
6+ months of experience in the following:
- UNIX/Linux platforms
- Software development/programming in high-level languages (e.g. Python, SKILL, C++, TCL)
- Layout manipulation and analysis methods