Skip to main content
Search jobs

Analog Mixed Signal IO Clocking Design Engineer

Bengaluru, Karnataka, India Job ID JR0264564 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced Full/Part Time Full Time
Apply

Job Description


Develops and drives analog and mixed signal IP architectures, low jitter clocking circuit implementation/verification, signal processing algorithms, and calibration algorithms for SoC independent analog mixed signal (AMS) IPs. Performs top down architectural analysis of AMS systems and conducts transistor level feasibility study for various AMS circuits. Drives analog and mixed signal functionality, connectivity, and configuration. Enhances system performance using digitally assisted analog techniques and optimum partitioning of analog and digital circuits. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for analog and mixed signal IP. Invents, conceptualizes, and specifies microarchitecture and architectural features for next generation to deliver optimized analog and mixed signal IP for multiple segments from high performance computing to extreme low power products. Develops modeling scenarios and modeling for new architectures/features for analog and mixed signal IPs. Performs modeling simulations, estimation, and optimization for power and area and conducts analysis of test results using advanced statistics and data predictions for benchmarking and determining areas for improvement. Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints. Reviews, challenges, and influences cross functional roadmaps and defines technology targets for future analog and mixed signal IPs. Collaborates with IP design engineers and IP verification engineers to design and validate SoC independent IPs. Supports SoC architects, SoC design engineers, and SoC verification engineers in selecting, configuring, integrating, and validating SoCs that utilize analog and mixed signal IPs.

Qualifications


PhD degree in Electrical/Microelectronics Engineer, or related STEM degree with at least 4+ years of experience in semiconductor IO/memory/PLL design OR
  • Master's degree in Electronics Engineering, Electrical Engineering or related STEM degree with at least 6+ years' experience in semiconductor IO/SERDES/memory/Clocking design OR
  • Bachelor's degree in Electrical/Electronics Engineering or related STEM degree with at least 9+ years in semiconductor memory design.
Preferred Experience:
8+ years of experience and skills within the following areas:
  • Expertise in Serdes/custom memory IO design including LPDDR, HBM,GDDR, CXL.mem, etc.
  • System Level simulation knowledge and experience in Matlab/Serdes Tool box.
  • Phase Locked Loops (PLL)s, PLL sub-circuits such as Phase Frequency Detectors, Charge Pumps, High-Speed Clock Dividers, Time-to-Digital Converters (TDC) and Digital-to-Time Converters (DTC)
  • High performance Oscillators, electromagnetic elements such as inductors, transformers, transmission lines for wireline and wireless applications.
  • Analog front-ends and equalizers utilizing BW extension techniques, high-speed ADCs and DACs.
  • Analog and digital filter design, digital signal processing (DSP) and digitally assistance for analog design
  • HSIO serdes, equalization, channel compensation tradeoff design.
  • EDA tool suite used for Memory, IO, SOC IP development, signoff, QA, and integration.
  •  Multi-generation product design experience in DRAM, Flash, or SRAM is required.
  • EDA tool suite used for Memory, IO, SOC IP development, signoff, QA, and integration.
  • Multi-generation product design experience in DRAM, Flash, or SRAM is required.


Inside this Business Group


The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Apply
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

  • GPU Software Development Engineer Multiple Locations View job
  • Cloud/SaaS SW Engineer Multiple Locations View job
  • Embedded Firmware Developer Malaysia View job
View all jobs

You don't have Recently Viewed Jobs yet.

View all jobs

You don't have Saved Jobs yet.

View all jobs

Join Our Talent Community

Be the first to hear about what's happening at Intel! Sign up to receive the latest news and updates.

Sign up

More About Intel