SoC Design Engineer
In this role responsibilities will be diverse and related to VLSI CMOS circuit design. You will own potentially multiple blocks and all related work dealing with circuit, layout, extraction, timing/noise/power analysis and as experienced engineer, provide some leadership responsibilities. Work closely with leads of other domains such as Architecture/RTL, PNR, Validation, DA, Full Chip Layout, Power, DFT, process, would be required. Work with the team and other domains to identify and implement changes to streamline the design flow for efficiency, help debug issues, mentor junior engineers and help train new hires. Working with inhouse and external industry standard tools for circuit simulation, static timing, noise, power, area, reliability would be part of the tasks along with scripting for optimizing flows, design automation.
In addition to the qualifications listed below, the ideal candidate will also have>
excellent spoken and written communication skills and very strong analytical skills.
You must possess the below minimum qualifications to be considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience OR a Master's degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience OR a PhD degree in Electrical/Computer Engineering or Computer Science and experience in:
Taping out of chips, and a solid background in VLSI design, Logic Design, Microprocessor Architecture
Circuit Design, Logic Design, programming, static timing analysis, low power design techniques, noise mitigation techniques, layout, etc. through either academic or industry work is required
For more experienced candidates that want a leadership position then you will have at least 1+ years’ experience with technical leadership and mentorship of junior teams and working in international cross site teams, etc.
Familiar with Perl or Python or Tcl,etc.
Inside this Business GroupIn the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Covid StatementIntel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
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