Graduate Technical Intern
As part of the Product Enablement Solutions Group, our team is specialized in transistor-level simulation for analog and mixed-signal designs. Our home-grown circuit simulator, housing Intel's critical transistor model, serves as the golden reference for process design kit development. In addition over the years, the team has developed a set of unique computer-aided design (CAD) capabilities widely used in Intel silicon design across multiple technology nodes, including scalable multi-threaded nonlinear system solution, parasitic estimation, RC reduction, optimization, process impact assessment on analog IP, and ML-based modeling approach. Closely working with a highly skillful team, you will participate in a broad set of solution development, including (but not limited to):Validation of new methods for analysis of modern process effects and quantify their impact on silicon designs. Large-scale datamining on netlist / layout to guide the data-driven development Writing software testing modules to automate validation and datamining. This internship will run for 3+ months.
This is an entry level position and will be compensated accordingly. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, and research.
Enrolled in a MS/Ph.D. program in Electrical Engineering, Applied Physics, Computation Mathematics/Science,
6 months of knowledge and experience in one or more of the following:
Numerical analysis / algorithms
Experience in modeling/simulation, optimization, machine learning, and associate software development
Knowledge of Experience Design Automation circuit simulator and interconnect modeling tools, a plus
Experience with Linux operating system
Experience with scripting
Inside this Business GroupIn the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Other LocationsUS, Santa Clara
Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Annual Salary Range for jobs which could be performed in US, California: $63,000.00-$166,000.00
*Salary range dependent on a number of factors including location and experience
Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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