In this position, you will be involved in the design, validation and integration of next generation Hard IP interfaces for various computing devices. You will have the chance to work in a challenging, fluid and dynamic environment with a diverse team of engineers who are delivering customized and optimized digital design logic. Your day to day activities typically involves close collaboration with engineers who are delivering technical solutions spanning most of the custom and digital design flow. These activities include but are not limited to: Debugging, analyzing and root causing problems that will ideally result in a proposed solution that is then subjected to a verification process Assisting the team in various tasks with the aim of gaining the relevant experience and familiarity with industry leading flows, processes and requirements Improving and automating existing tasks and activities for greater efficiencies.
Inside this Business Group
BSc or MSc in Electronics/Computer engineering with strong background in analog and/or digital designs. The candidate should have strong inter-personal skills, be able to work independently from time to time, and be able to work in a very fast paced environment. Any relevant amount of experience would be an added advantage, including: - IP integration experience involving various disciplines e.g. circuit, RTL, APR and custom layout. - Experience in analog IO interface design including platform design implementation of various IO interfaces. - Knowledgeable in digital logic design, VLSI CMOS custom circuit design - Strong programming skills in C/C++, or Perl/TCL - Strong analytical and problem solving skills. - Good communication and strong analytical skills
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.