The Intel Communication and Devices Group is looking for a Virtual Prototyping (VP) methodology engineer and an all-around Maker to play an integral role for facilitating VP based prototyping for complex wireless SoC platforms. We provide a highly sophisticated System Level Design and Prototyping flow that enables the development of leading edge wireless solutions. As part of the pre-silicon validation methodology and flow team you can directly influence the efficiency and quality of our wireless platform (chip + firmware + software) development. This includes adaptation, automation and optimization of the VP development infrastructure.
This role will develop/create advanced Virtual Prototyping Methodologies and Flows to prototype hardware and firmware, our work is the foundation for providing outstanding products to our customers.
Join us now as:
Virtual Prototyping methodology engineer (f/m)
Your major accountabilities:
Virtual Prototyping Methodology and Flow development and project support
Proficient in object-oriented programming, with extensive working/hands on knowledge of SystemC/ C++
Proficient in hardware abstraction and Virtual Prototype concepts
Experience with Virtual Prototyping and System Level Design Flows and Tools (e.g. Synopsys Virtualizer, SIMICS, ARM Fast Model ) including usage of appropriate debugger (e.g. Lauterbach)
Architectural performance and power analysis (e.g. Synopsys Platform Architect, Cofluent, Docea)
Tools used in System Level Design, Software development and RTL implementation
Strong experience with Linux development tools (e.g. Eclipse) and programming/scripting skills (eg. C, C++, Perl, TCL, Python)
Verification mindset and outstanding sense and drive for continuous improvements
Experience in performance analysis/debug techniques.
Solid IT know-how: OS,UNIX, Windows, version control
Strong analytical ability and problem solving skills, ability to quickly learn/adapt new technologies
Supportive attitude, excellent communication skills with global teams and EDA supplier
Knowledge of VHDL, Verilog, System-Verilog, micro-architecture development, Signal processing, filters, data-path designs, communication systems & standard and ASIC design flow (RTL to GDS) would be desirable
BS or Master's degree in Computer Science Electronics or Electrical Engineering, with concentration on System and SW development
industry experience in digital design of complex SoC IP blocks and products. Extensive experience in Virtual Prototyping and RTL prototyping systems.
Candidate should possess strong digital design and VLSI fundamentals.
Intel is one of the largest suppliers of chips for the communications market. The Intel Communications group is focused on designing and building communications technologies such as Ethernet connectivity products, optical components, communications processing solutions and broadband products.