Skip to main content
Search jobs

Front-end RTL/Verification Tools & Methodology Engineer

San José, Provincia de San José, Costa Rica Job ID JR0258979 Job Category Silicon Hardware Engineering Work Mode Hybrid Experience Level Experienced Full/Part Time Full Time
Apply

Job Description


The FE TFM Engineer is required to conceptualize, implement and deploy best in class Front End tools, flows and methodology. They work closely with project logic design and verification teams, understand requirements and challenges, and find solutions and help them set the flow and tools with automation around. Candidate will be responsible for developing and supporting Front End EDA tools services to ensure efficient design activities and will be interfacing with internal (Intel specific tools and flows) as well as industry/vendor experts (synopsys/cadence/mentor and others as may). The candidate will actively participate with Design Engineers, Design automation engineers on live debugging, root causing, and troubleshooting - in addition to identifying and pursuing design productivity improvements. Main Duties: 1) Driving the overall FE Tools flows and methodology enablement for Network and Edge products, interfacing with Intel CAD teams and flow experts and EDA vendors. 2) Develop, Evaluate and Deploy required tools, develop methodology using automation and tool development techniques and BKMs, including anticipating/understanding future project teams needs and requirements. You will be expected to resolve designer's and verifiers tool/methodology issues on path to Tape Outs. 3) Learn and explore new AI ML tools and solutions to help designer and verifier improve overall design cycle efficiency 4) Providing support for design ramp up to execution through training/documentation/presentation, 5) You will require to be involved in interacting with EDA providers and ensuring required tools features available for the projects with high quality. 6) Work on active design activities in support of project deliverables and milestones.

Qualifications


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor's degree in Computer Science or related engineering field and 4+ years' relevant experience in the following areas =

  • Knowledge in industry on FE EDA tools and IP/Chip Design and Verification methodologies

  • Experience with Verilog, System Verilog, RTL Design, Simulation, UVM and static checks, Clock and Reset Domain Crossing

  • Excellent Debugging skills - Flow development and FE EDA tools and automation

  • Proficient in shell scripting and scripting programming languages (Perl/Python/Tcl) in Linux-based environments.

  • Experience in establishing and qualifying SoC design flow from an EDA reference flow and addressing product specific design/methodology requirements.

  • Intermediate to advanced English communication skills.


The candidate should exhibit the following behaviors skills:

  • Great customer orientation skills.

  • Strong communication skills, ability to clearly convey technical content with peers.

  • Ability to deal with ambiguity and incomplete information.

  • Highly motivated individual with a 'can-do' attitude


Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.


Inside this Business Group


The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Apply
Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

  • Analog Layout Design Engineer Multiple Locations View job
  • Liquid Industrial Waste Systems Technician - Kiryat Gat Kiryat Gat, Israel View job
  • Senior Software Engineer for the Intel AI Solutions Group Petah Tikva, Israel View job
View all jobs

You don't have Recently Viewed Jobs yet.

View all jobs

You don't have Saved Jobs yet.

View all jobs

Join Our Talent Community

Be the first to hear about what's happening at Intel! Sign up to receive the latest news and updates.

Sign up