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Design Verification Graduate Intern

Hillsboro, Oregon, United States| Santa Clara, California, United States| Hudson, Massachusetts, United States Job ID JR0259771 Job Category Intern/Student Work Mode Hybrid Experience Level Intern Full/Part Time Full Time
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Job Description


Role and Responsibilities:

The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people's digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful.

Your responsibilities as a Design Verification Graduate Intern may include, but may not be limited to:

  • Development of functional validation tests to verify the implementation meets design specification.
  • Execution of test-plans, development of test-bench components (BFMs, checkers, trackers, scoreboards) and functional coverage.
  • Defining, implementing, and deploying verification capabilities, methodologies, and process improvements.
  • Create Mixed signal setup/test-benches to enable spice simulations
  • Active participation in improvement of tools, flows and methodology for efficient design verification

The ideal candidate should exhibit behavioral traits that indicate:

  • Excellent interpersonal skills, including written, verbal, and presentation communications
  • Attention to detail and organizational skills

Qualifications


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must be pursuing a Master's or Ph.D. degree in Computer Engineering and/or Electrical Engineering with knowledge in:

  • Computer Architecture design knowledge, System Verilog concepts and OVM/UVM.

Preferred Qualifications:

  • Familiar with RTL design
  • Object-oriented programming knowledge (C++, System Verilog)
  • Testbench component development (preferably in OVM/UVM), and test debugging skills.
  • Scripting languages such as TCL/Perl/Python

Requirements listed could be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.


Inside this Business Group


In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations



US, CA, Santa Clara; US, MA, Hudson


Posting Statement


All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in US, California: $63,000.00-$166,000.00
*Salary range dependent on a number of factors including location and experience


Working Model


This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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Maggie, Offensive Security Researcher

Maggie Offensive Security Researcher

“I’ve always wanted to do something that changes the world — at Intel, I feel appreciated, and I’ve gained more confidence in myself. It makes me feel like I’m capable of doing great things.”

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