Pre-Si Verification Lead Job
Date: Aug 5, 2014
Location: Irvine, CA, US
Job Description: Develops pre-Silicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.
In this position, you will be a member of the Pre-silicon validation team in the Cloud Platform Group (CPG), responsible for functional correctness of next generation of memory buffer/controller for high end server platforms. Your responsibility will include but not be limited to:
- Validating designs at block or full-chip level by authoring validation plans, writing focus tests, creating templates defining coverage strategies, developing and analyzing coverage monitors, creating event injectors, writing architectural and micro-architectural correctness checkers, developing BFMs (Bus Functional Model), running functional simulations, and debugging failures.
- Maintaining and enhancing the validation infrastructure by creating new tools to support validation.
- Leading a small team of engineers through any of the above.
- Contributing to the organization's longer-term technical vision by identifying and driving technologies that offer shorter validation cycles, higher quality silicon (no bug escapes) or methodologies that provide significant productivity gains.
- Working in a very team-oriented environment and interacting with engineers from other design disciplines.
- This is a hands-on technical role with high impact, visibility and learning opportunities and the individual will help pave the path in developing the capabilities and infrastructure within the organization. Strong grade 8 and 9 are encouraged to apply.
- You must possess a Bachelor's or Master's degree in Electrical Engineering and/or Computer Engineering and/or Computer Science with 6+ years of experience.
- Must have 4 or more years of design or Pre-Silicon validation experience.
- 2 or more years experience with any combination of the following: System Verilog, OVM/UVM, System C and or C++ as a verification tool.
Additional qualifications include:
- Experience with microarchitecture verification, highly desired.
- Knowledge of analog and basic circuit design.
- Knowledge of high speed I/O and related protocol.
- Knowledge of post-silicon debug would be an added advantage.
- Knowledge of validation of micro-controller based design and/or Non-Volatile Memory (NVM) is a plus.
Job Category: Engineering
Primary Location: USA-California, Irvine
Full/Part Time: Full Time
Job Type: Experienced
Posting Date: Apr 11, 2014
Business Group The Datacenter and Connected Systems group drives new products and technologies from high-end co-processors for supercomputers to low-energy systems for the cloud, as well as solutions for big data and intelligent devices. The group is a worldwide organization that develops the products and technologies that power nine of every 10 servers sold worldwide.
Posting Statement: Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
Nearest Major Market: Irvine California
Nearest Secondary Market: Los Angeles