Join the clock micro-architecture and logic design team of the Client Development Group at Intel and develop one of the most complex and interesting clock systems implemented in a VLSI chip.
As a clock logic design engineer you will contribute to specifications at the micro-architecture level. You will be required to implement logic design block and integrate logic functions required by the IP in System Verilog. Work will include collaboration with cross discipline stake holders including design for testability, pre silicon validation and back end design teams and IP integration support to SoC customer.
- B.Sc. in Computer/Electrical Engineering;
- 2+ years of experience in RTL design/logic design;
- Experience with High speed, Low Power Designs;
- Good knowledge in design development environments;
- Experience in developing in System Verilog is an advantage.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.