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Job ID: JR0054364
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

SoC-IP Design Lead

Job Description

As a manager, set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance. Oversees definition, design, verification, and documentation for SoC System on a Chip development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development. Selects, develops, and evaluates SoC design engineers to ensure the efficient operation of the function.


Qualifications

Job Description: In this role as Logic Design Engineer in Intel's Platform Engineering Group organization, you will be responsible for the below items focusing mainly on logic design aspects of an IP/Subsystem/SoC design & development Define micro-architecture, write block/IP level specifications and logic design Implement specifications/design in RTL Should be adept in SuperCluster Integration flows using standart industry tools Should be adept in running and analyzing CDC, DFT and UPF for a super cluster env. Work with pre-silicon validation/verification team to develop test plans and verification collaterals Work with physical design team for FP & timing aware logic design Work with post-silicon validation teams to resolve silicon level sightings Oversees definition, design, verification, and documentation for an IP/Subsytem/SoC development Determines architecture design, logic design, and system simulation Defines module interfaces/formats for simulation Understanding of PCIe protocol is desiredQualifications:Qualification:- You must possess a Bachelor/Masters/Ph.d degree in electronics/electrical/communication/VLSI/Microelectronics and/or related engineering/technology with experience in the range of 3 to 15 years in defining specifications/architecture & RTL/Logic design of IPs/subsystems/SoCs. Publications and patents in relevant fields would be an added advantage. Below are some of the specific expectations for this role- Expertise in logic design with Verilog/System Verilog- Strong background in computer architecture and understanding of OOP, data structures, algorithms and digital logic- Hands-on knowledge in multiple clock domain, power plan designs- Familiarity with DFx- Expertise with Verilog, system Verilog, C, Perl languages- Ability to clearly express technical concepts in verbal and written form - Innovative thinking, problem solving, good communication skills, self-discipline and results orientation are critical soft-skills needed - Good hands-on knowledge on industry standard EDA tools & HDLs- Good hands-on knowledge of using scripting languages would be an added advantage- Strong assembly level programming and software development/debugging skills

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


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