At Intel Server group, our teams are diverse, competitive, and continually searching for cutting edge technologies of future.As a "First Level Technical Engineering Manager", you will be managing logic design and pre-silicon verification team. Job Responsibilities include but not limited to :-Setting project direction, execution, milestones and schedules for the designs being developed from India with close collaboration with cross sites like US teams.-Plan and manage resources for delivering high quality system products-Lead development of the Digital IP/SubSystem from concept to product qualification .-Deliver complete internal specifications or Micro Architecture documentation.-Evaluating, selecting and integrating third-party IP.-Working with physical design ensuring robust and complete timing constraints and evaluating STA results. -Accountable for driving development of pre-si test environments, test plans, functional coverage in coordination with technical leads. -Track project execution and report out to senior management team-Working across different geo and time zones for Architecture, design & verification, Structural Design, DFT, emulation, and post Silicon Verification teams on various issues and collaborating during overall product development cycles-Working with system and post-si validation testing teams during bring up and DVT phases.-Quickly assimilate knowledge, infer consequences and solve problems before they occur.-Able to provide technical mentorship and direction to junior members.-As a manager, set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance. -Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost. -Cultivates and reinforces appropriate group values, norms and behaviors. Identifies and analyzes problems, plans, tasks, and solutions. -Provides guidance on employee development, performance, and productivity issues. -Plans and schedules daily tasks, uses judgement on a variety of problems requiring day to day problem solving.
Qualifications-Min 15 years of relevant design experience, with at least 3-5 years as Technical manager in digital IP/SubSystem domains.B.Tech/M.Tech Degree in Electrical/Electronics or Computer Engineering.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.