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Job ID: JR0053691
Job Category: Engineering
Primary Location: Hudson, MA US
Other Locations:
Job Type: Experienced Hire

SOC Validation and Integration Manager

Job Description
  • As a manager, set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance
  • Oversees definition, design, verification, and documentation for SoC System on a Chip development
  • Determines architecture design, logic design, and system simulation
  • Defines module interfaces/formats for simulation
  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits
  • Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results
  • May also review vendor capability to support development
  • Selects, develops, and evaluates SoC design engineers to ensure the efficient operation of the function


Qualifications

Opportunity to come work with a world class design team creating enterprise class CPU designs.

We are looking for motivated engineers to work with us on the Chassis CTE model, which is a small representative SOC design.

Our team deals with both FE integration and validation skills and there is an opportunity to manage both validation and integration activities.

Minimum Qualifications:

  • Mster's degree in Electrical Engineer plus 10+ years relevant experience OR Bachelor's degree in Electrical Engineer plus 12+ years relevant experience
  • Experienced manager with proven track record leading front end activities including front end integration or validation
  • Experience with validation and integration best practices as both and individual contributor and a leader
  • Familiarity with Collage, ACE/BMAN, Verdi, GIT, Gatekeeper, System Verilog, OVM Saola and/or HSD ES is a plus
  • Good understanding of SOC practices and methodologies
  • Strong organizational, planning and communication skills
  • Ability to work under pressure and multitask in a multi-site environment spanning multiple time zones

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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