Job Description In a fast paced leading edge environment with endless possibilities of innovating and learning, you will be responsible for design of complex digital blocks and sub-chip of large designs like GFX, Imaging processors, Peripheral subsystems like PCIe, TypeC, Display, Media etc or other high speed designs like Memory subsystems/DDR Gen5/6, High Speed Serial IOs etc.Key responsibilities include but not limited to- RTL2GDSII implementation of complex subsystems/phys in advanced process nodes 10nm and below- Define the right recipes that produce the best PPA for the designs on the new architectures and technology nodes.- Working closely with the Frontend and Custom teams to enable fast design convergence and best PPA- Work with the SoC teams to facilitate seamless integration of these complex sub-chips or phys for final tapeout
Mtech/Btech in the fields of computer engineering/science with 8+ years of experience in the areas of RTL2GDSII Floorplanning, Physical design, APR and signoff flows designing chip level or block level layouts in advanced process nodes. Experience in ASIC Physical Design RTL to GDSII Implementation flow in areas of Logic synthesis, floor planning, power planning, placement, CTS, routing, timing sign-off, fill, layout verification etc. Experience with Low power design closure UPF based implementation and associated sign-off SG-LP/VCLP/Conformal methods. Knowledge of Timing .lib generation, Physical View Generation LEF, GDS, CEL, FRAM, NDM etc.. Experience in Reliability Verification EM/IR drop etc. is added plus. EDA tool knowledge: Design Compiler, ICC/ICC2 is preferred. Team player, with good problem solving and communication skills. Automation skills in PERL and/or TCL and/or Shell* is an added plus
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.