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Job ID: JR0053011
Job Category: Engineering
Primary Location: Hudson, MA US
Other Locations:
Job Type: Experienced Hire

IP-SOC Logic Design Engineer

Job Description

Oversees definition, design, verification, and documentation for SoC System on a Chip development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.


Required Experience/Skills (Must Have)

  • M.S. in Computer Science, Computer Engineering or Electrical Engineering plus 3 years of relevant work experience OR B.S. in Computer Science, Computer Engineering, or Electrical Engineering plus 4 years of relevant work experience.   
  • RTL Verilog OR SystemVerilog with a working knowledge of hardware modeling issues and logic debug environments  Modern energy-efficient/low-power logic design techniques, including those specifically applicable to high frequency optimization  TAP Controller and DFX   
  • Work or educational experience in the following areas: Knowledge of computer architecture and pipelining, including major CPU sub systems.  
  • Scripting in Perl, Python, Ruby, TCL, or some other scripting language.  

Preferred Qualifications

  • Customer support and debug for IP integration at SOC level  Synthesis and speed path debug  Industry standard circuit design tools, including schematic capture, logic synthesis, place and route, static timing analysis and design closure  
  • Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments.
  • Demonstrate ability to lead small work group to complete mega tasks at IP or SOC level.
  • Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.   
  • High speed circuit design and optimization for analog, mixed signal, special circuits and/or, large/small signal arrays
  • Familiarity with circuit planning and physical layout. 
  • Research publications, patent filings, or other evidence of personal technical innovation

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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