In this position, you will join the next generation CPU verification team and will be responsible for exhaustively validating the architecture and micro-architecture changes implemented in the CPU using a combination of dynamic and formal verification methods.
Your responsibilities may include, but are not limited to, the following:
Technical ownership of validation of a micro-architecture block, methodology, or otherwise significant aspect of CPU
Understand and contribute to micro-architecture specification and define verification strategy for a significant portion of the design
Lead ROI analysis and recommend appropriate use of formal verification vs dynamic validation techniques for relevant parts of the CPU
Document test plans and drive technical reviews of plans and proofs with design and architecture teams
Develop validation content like test benches, test generators, formal proofs and automation tools to accelerate execution
Influence and contribute to post-silicon validation focus and sighting resolution
Mentor junior team members to become the rock-stars of tomorrow
M.S. in Computer Engineering or Electrical Engineering plus 3 years of relevant work experience OR B.S. in Computer Engineering or Electrical Engineering plus 4 years of relevant work experience.
Total of 4+ years of work experience in the following areas:
In-depth computer architecture knowledge with emphasis on out of order processor execution
Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
Knowledge of test bench development concepts and languages like Specman, System Verilog UVM/OVM
Experience in test writing/generation, checker development, coverage analysis, failure debug, root cause analysis
Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
Intel or industry experience in pre-silicon verification of CPU cores including specific areas of technical ownership/expertise relevant to CPUs
Knowledge of Intel Architecture ISA and system architecture, x86 assembly language
Hands on experience with industry standard formal verification tools such as JasperGold, IFV, Questa Formal, VC Formal
Post-silicon debug and analysis
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.