In this position you will work with R&D team whom designing the Chipset and SOC IP for Intel latest product. Your responsibilities will include but not limited to:
-Involve in defining High Level Architecture Spec or Component Spec.
-Involve in RTL logic design in System Verilog, Verilog and other Hardware description language.
-Validating the functionality of new architectural features of next generation designs by developing testplan, tests content or test tools.
-Developing automated tools or scripts for the pre-silicon validation environment.
-Representing RTL team to provide IP integration support to SOC customers.
Inside this Business Group
The applicant should have -Bachelor degree in Electrical & Electronics or Computer System Engineer or higher and 7+ years of Digital Logic Design and Pre-Silicon Validation experience. -Experience in System Verilog, OVM and Architecture Spec definition. -Able to develop testplan, to write tests and develop coverage point for validation purpose based on high level Architecture spec. -Experience in VLSI or Structural and Physical design flow/methodology.-Experience in PCI express or any Industrial standard bus protocol would be added value. -Strong analytical and debugging skill, and creative in problem solving. -Good leadership, interpersonal and communication skill.
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.