As a Pre/Post Silicon Validation Engineer, you are required to creates, defines and develops system validation environment & test suites. Uses & applies emulation & platform-level tools & techniques to ensure performance to spec.
You are responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features.
You are responsible in validating the functionality of new architectural features of next generation designs by developing test plans, tests content, coverage points or test tools.You are focal point between a number of Architecture, Design and Validation teams within Intel and across different sites.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.