-Performs logic design, Register Transfer Level RTL coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
-Participates in the development of Architecture and Microarchitecture specifications for the Logic components.
-Provides IP integration support to SoC customers and represents RTL team.
The applicant should have:
-Bachelor degree in Electrical & Electronics or Computer System or related Engineering, and 5 to 7+ years of Pre-Silicon Logic Design experience. Or Master degree and 3 to 5+ years of related experience.
-Experience in performing logic design, Register Transfer Level RTL coding, and the development of Architecture and Micro-architecture specifications for the Logic components.
-Experience in collaborating with Pre-silicon validation, Architecture team to achieve full coverage validation strategy/design scoping plan on the new feature set, and even leading new feature set execution
-Experience in analyzing and driving design flow/tools flow methodology/coverage validation activities across projects horizontally.
-Experience in VLSI or Structural and Physical design flow/methodology.
-Experience in USB/PCI express or any High Speed Serial I/O protocol is highly desired
-Strong demonstration to able to work well with each other towards common goals, aligned with career development
-Strong analyzing and debugging skill, and creative in problem solving.
-Strong programming skill in System Verilog, Perl, C++ or etc
-Strong written and verbal communication skills.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.