In this position candidate will be part of R&D team who design and develop the Chipset and SOC IP for Intel latest product. Apart from performing SOC Front End related activities ranging from Fullchip RTL development, integration to verification using state of the art tools and methodology, candidate also has the opportunity to drive for methodology and technology enhancements that spans across multiple geographies.
Specific responsibilities include but not limited to:
-Involving in RTL logic/testbench/verification environment design in System Verilog, Verilog or other Hardware description language and integration
-Involving in capabilities building within and outside the SOC Front End team
-Validating the functionality of new architectural features of next generation designs by developing testplans, tests content, coverage points or test tools
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.