The Validation Chief Engineer is responsible to plan and drive execution of Pre and Post Silicon validation activities to meet TTM requirement. This includes being able to work with multiple domain experts to ensure quality validation implementation and drive problem resolution.
The Validation Chief Engineer will also define the validation features that are required to drive Train Release Planning and execution, in the context of the AGILE methodology. Need to be able to effectively work with design, validation, software/firmware, platform as well as manufacturing teams, for comprehensive coverage.
Requires broad understanding of multiple system architecture, SoC DFx/validation methodologies, and simulation/emulation/FPGA technologies.
Desired skills include strong background of SOC pre and post silicon validation with hands on experience. Demonstrated expertise in driving execution and delivering products as well as strong understanding of IP development and integration
Bachelors or Masters in Electrical/Electronics/Computer engineering with at least 5yrs experience leading an engineering team.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.