Inside this Business Group
The candidate will be part of graphics Debug and Hvm design/validation team under Visual Technology Team VTT responsible for design and proliferation of graphics cores which would eventually become part of Intel CPUs. The team is responsible for design and validation activities related to 3D and / or media debug and HVM features of Intel's next generation graphics cores. Overall responsibilities include but are not limited to: development of micro-architecture, RTL coding and validation.development or modifying test verification environmentsdevelopment of testplans, test writing and executionwork with structural design teams to ensure timing closure for the owned unitswork with validation and integration teams for debugs / fixes pre and post SiliconWorking knowledge of System Verilog/Verilog HDLKnowledge of scripting languages like shell scripting and PERLKnowledge of spyglass, ATPG tools and GLS etc will be plus
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.