Design Automation Engineers are advocates of methodologies to help projects to be effectively and successfully executed with high quality. In this position, you will be responsible for developing and deploying custom layout design & verification flows and techniques to enable design teams in Intel. Your responsibilities will include but not be limited to Responsible for tool, flow & methodology development for the design of Analog & custom digital designs on leading Intel process Responsible for development of physical verification tool, flow and methodology on Intel Process Provide Design Automation support across Business units in the tools/flows used in the layout implementation across different Intel sites. Responsible for internal/external vendor interaction, developing new concepts/BKMs in the custom layout domain and deploying those capabilities to different design teams.- Expertise in Custom Layout Tools and AMS flows- Experience in design and debug custom layouts- Good working knowledge in APR flows - Good understanding of chip finishing and DFM flows- Good automation skills in SKILL, PERL and/or TCL and/or Shell* - Good communication skills written and verbal - Ability to work in a multisite team environment
7-12 Yrs of expereinceInside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.