Oversees definition, design, verification, and documentation for SoC System on a Chip development.
Determines architecture design, logic design, and system simulation.
module interfaces/formats for simulation.
Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
May also review vendor capability to support development.
Candidate will have a Master's in Electrical Engineering or Computer Science with 6+ years of industry experience.
Hands-on experience with Verilog, System Verilog coding
Strong knowledge of SoC front-end design methodology -including RTL coding, STA analysis, lint/CDC, code coverage-PCIe, MIPI, DDR protocol knowledge is desirable-
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.