Today clock network performance is critical for the SoC performance required to support dynamic range for frequencies, reaching high frequencies, low skew and duty cycle errors. In this role, the Senior Clock Design Engineer will be part of clock team contributing to Xeon server designing. As senior Engineer, the individual will be involved in design of digital and analog circuits for the implementation of the clock distribution network including supporting IP blocks. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan. Your expertise in deep submicron technology, processor design, and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team. You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.
BS or MS with 12+ years of experience in ASIC Physical Design. Strong expertise in high frequency clocking methodologies including global clock tree design and block level clock tree synthesis. Well versed with challenges with clock distribution in big System on chip and implementation strategies to address the same. Well versed with floorplanning, timing constraints, STA and timing closure. Experience with low power design features and flows.Working experience with tools like ICC, Primetime etc used in the RTL2GDSII implementation and spice simulation tools. Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools. Strong analytical & Problem solving skills. Ability to multi-task and flexibility to work in global environment. Good communication skills and strong motivation for customer support.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.