Intel's Mixed Signal group is helping Intel's next generation processors be the smartest in the world and we are looking for talented engineers to join us.
This is an excellent opportunity for a creative and motivated engineer to be part of the best in class Ethernet PHY development team doing exciting work in the development of next generation high speed serial I/O’s. This role offers a platform for the engineer to take his/her design and integration skills to a whole new level.
This position is located in Jerusalem, IL.
•B.Sc or M.Sc degree in Electrical or Computer Engineering or related fields
•4+ years of experience performing IP integration, RTL logic design using System Verilog
•Experience dealing with challenges in multi-clock and multi-power domain designs and familiarity with the EDA tools supporting such designs
•Experience using scripting languages in design automation using languages such as TCL, Perl, Python
•Strong problem solving and debugging skills and ability to work closely with various chip design disciplines and cross site teams
•Proven verbal and written communication skills
•Motivated, self-directed, and able to work effectively both independently and in a team environment
•Experience in Design for Test (DFT), C code, Ethernet protocols IEEE802.3
•Ability to debug errors in various cad tools (CDC, Spyglass, PowerArtist, Verdi, etc)
•Good level of understanding of the power Management, reset, clock, and power domain challenges for large IPs
•Experience dealing with Inter IP floor planning and timing, ability to work closely with Physical designersInside this Business Group
Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services.