In this position, the candidate will be responsible for defining, executing and debugging test content on state of the art Intel's data center next generation of products.
Validation covers pre-silicon and post-silicon validation through: emulation, FPGA and simulations, silicon and firmware debug, executed at SoC level and focused on IP integrated functionality and customer usage models.
Will be responsible for the development of methodologies, execution of validation plans, and debug of failures, will use either a commercial operating system or custom software to develop the test content and provide confidence on the Silicon's health.
-Skilled C/C++ programmer
-Python is desired, but not required-Hardware debug capabilities using instruments, but not limited to Scope, Logic Analyzer or Protocol Analyzer.
-Digital Design knowledge VHDL/Verilog is desired but not required-Knowledge of Server and SoC platform architectures is desired, but not required
-Both written and spoken Fluid English communications
-A precise attention to detailsInside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.