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Job ID: JR0042191
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations:
Job Type: Experienced Hire

Device interconnect/Modeling Engineer

Job Description


Qualifications

Device / Interconnect Modeling Engineer

Job Description
 

You will be responsible for device and interconnect model generation for Intel’s non-volatile memory group (NSG).   Additional responsibilities will include tool selection, incorporation of reliability mechanisms and tools into design methodology (e.g. Aging Simulations) and definition of process corner cases.  You are expected to work closely with the device and design teams to define device requirements, and selection of circuit elements for various analog and digital design blocks. 

Qualifications

  • A PhD or Master’s degree in electrical engineering or related discipline with at least 5-7 years of direct experience in CMOS, interconnect modeling, and characterization. 
  • NVM (NAND/ Emerging memory) experience is strongly preferred but not require
  • Must have a strong background in semiconductor device physics, design and layout of structures for parametric extraction
  • Solid understanding of basic analog / digital circuit blocks and model interaction
  • Extensive experience in BSIM3/4 models and other compact models, extraction tools (ICCAP or MBP) and commercially available simulators (example: HSPICE, SPECTRE, etc.).
  • Hands-on experience in semiconductor device DC/CV characterization tools, techniques and systems. Experience in test automation and reliability test is a plus.
  • Hands-on experience in C, C++ and/or python programming.
  • Experienced in Cadence design environment, including schematic capture, analog design environment and virtuoso layout design, DRC, LVS, and layout extractions.
  • Solid understanding of Aging Simulations and reliability methodologies and tools.
  • Experience with device simulation tools (e.g. Medici/ Atlas) is preferred but not required
  • Demonstrated leadership skills in defining model development roadmap and aligning goals with the design/ TD requirements. Must be able to operate in a matrix environment with multiple priorities and deadlines, and have the ability to work with a cross-disciplinary team of external and internal partners.
  • Strong communication skills
  • Expert in data and statistical analysis tools (such as JMP, Excel, etc.) and techniques. 

Job site is Santa Clara, CA. 

Inside this Business Group
 

Non-Volatile Solutions Memory Group:  The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash and 3DXP memory products for use in Solid State Drives (SSDs) and other memory applications.  The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.

Inside this Business Group

Non-Volatile Solutions Memory Group:  The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices.  The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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