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Job ID: JR0041693
Job Category: Engineering
Primary Location: Munich, DE
Other Locations:
Job Type: Experienced Hire

Sr. Mixed Signal IPs Physical Design Engineer (m/f)

Job Description

Responsibilities may include, but are not limited to:

- Block-level floor planning

- Logic synthesis of design blocks

- Formal Equivalence Verification FEV

- Auto Place-and-Route APR using Synopsys ICC tools

- STA/ Timing verification using Synopsys Prime Time as well as Intel tools

- Physical verification

- Layout vs. Schematic LVS, Design Rule Checks DRC, Electrical Rule Checks ERC, and Design for Manufacturability& Reliability checks DFM, RV


Qualifications

Required Skills:

- Extensive knowledge of RTL to GDS flow : from design constraining to STA , to ICC

- Excellent verbal and written communication skills

- Excellent Team work Education & Experience

- Degree in Physics, Electrical Engineering or Computer Science

- MS with 5+ years of relevant experience as physical designer is required

- Expertise in analog layout is considered a strong plus

- Expertise with test chip design is a plus

- Hands on Experience with Intel technology is considered a strong plus

Inside this Business Group

Communication & Devices Group: The wireless revolution at Intel! We are one team - passionate engineers and technologists from diverse industry backgrounds working together to realize a world of connected computing. We are bringing the best ideas from the brightest minds to deliver future mobile experiences into the market. We are on the journey towards making Intel a wireless leader with exciting products for the Internet of Things, 5G and an opportunity to change the world with your work.

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