The Scalable Performance CPU Development Group SDG is searching for an energetic and passionate physical design Manager who is ready to drive and grow a team of SoC design engineers. We are looking for someone who has passion around improving the way we solve complex problems through the work of the team as wells as their own direct contributions.Direct Responsibilities:Oversees definition, physical design, physical verification, and documentation for SoC System on a Chip development. Determines chip floorplan, working with packaging, design, and board level teams. Defines interfaces/formats, timing closure points, timing/physical constraints at module and chip level. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC physical design flow from high-level design to synthesis, place and route, DFx, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. The ideal candidate will be able to demonstrate the following behaviors:Ability to work effectively with both internal and external teams/customers is expected.Experience with silicon which include processor cores and custom logic working together with strong problem solving skills Strong written and verbal communication skillsCapable of working in a high performing team to deliver the results required from the organization. Facilitator of direct and open communication, diversity of opinion, and debate. Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost. Cultivates and reinforces appropriate group values, norms and behaviors. Identifies and analyzes problems, plans, tasks, and solutions. Provides guidance on employee development, performance, and productivity issues.
BS degree in Electrical Engineering, Computer Engineering or other related field of study with a minimum of 15+ years of relevant experience in SOC/system design/verification or MS degree with 12+ years or PHD with 8+ years of directly related experience with SOC Design and/or Validation Industry ExperienceCandidates must have the following:Proven expertise in Silicon product development. Experience with designing/dealing with various type of external interfaces, like DDR, PCIe or similar. The ability work as an individual and as part of a team to deliver a product starting from the creation of the spec, design, verification, and finally to productization is a strong requirement.Expertise in dealing and designing with complex IP's from different sources onto the same piece of silicon. Understand system and package implications of the silicon/FPGA design decisions.Preferred Skills : Experience building physical design environments and flows based on industry standard toolsExperience with implementing and working with multiple fab's and technology nodesInside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.