Inside this Business Group
MS or higher in Electronics/Electrical Engineering or equivalent with a minimum of 1 to 2 years of experience in on-package multi-chip IO and SERDES design in VDSM technology nodes.Good to have either IO buffer, PLL/DLL or linear regulator design experience.Possess excellent analytical skill and provide effective solutions to technical issues in a timely manner.Nice to have track records to successful tapeout IPs.Familiar with VDSM parasitic effects and signal integrity to design robust and reliable analog IPs.Nice to have FinFET experience. Experienced in floor-planning and reviewing layout, particularly on sensitive analog circuitry.Good to have good understanding of layout tradeoffs for optimal performance and size.Possess excellent communication skill for successful interaction with wide range of engineering groups on deliverable across different geographical sites
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.