Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.
Description Job Description: Architects and develops Pre-Silicon functional validation collateral to verify system will meet design requirements. Creates and executes test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing. Successful candidate will work as part of High Speed IO design. The responsibilities will include but not be limited to: * Defining, implementing, and deploying verification capabilities, methodologies, and process improvements. * Development and execution of test-plans, test-bench components BFMs, checkers, trackers, scoreboards and functional coverage. * Working closely with other verification engineers, RTL design engineers, micro-architects, and other team members to ensure quality of test-plans, verification environment, and tests. * Strong discipline and attention to detail in ensuring high quality verification that minimizes bug escapes to higher levels of validation * Mentorship of junior team members on verification BKMs and debug Qualifications* Extensive experience with architecting verification environments and components random test generators, scoreboards, BFM's, coverage, etc.* Proven knowledge of System Verilog, OVM, object-oriented programming* Strong knowledge of SIP tools and methodologies like Saola, ACE, VCS, etc.* Knowledge of standard bus protocols like PCI, IOSF, AHB, etc. is highly preferred* Strong understanding of logic design and micro-architecture fundamentals* Knowledge of C/C++ & Perl scripting preferred.* Must demonstrate strong initiative, teamwork, planning, and communication abilities due to deliverable impacting multiple projects and stakeholders. *MSV/Spice simulation exposure is preferred* Excellent verbal and written communications skills.* Candidate must have a minimum of MS in EE/CS and 5+ years of relevant experience.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.