Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.
Minimum Requirements: Candidates must possess a Bachelor or a Master's degree in Electrical or Computer Engineering fields. 8+ years experience in logic verificationAt least 3+ years experience in an object oriented verification language such as System Verilog using verification methodology like OVM/UVMAdditional Preferred Requirements: Experience in Mixed Signal Validation of mixed signal IPsExperience in memory protocol design verification like DDRInside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.