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Job ID: JR0040017
Job Category: Intern/Student
Primary Location: Penang, PNG MY
Other Locations:
Job Type: Intern

PDE Graduate Trainee

Job Description

Job Description: Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Make significant contributions to design, development and validation of testability circuits. Evaluation, development and debug of complex test methods. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies and re-designs circuits to guarantee component margin to specification. Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Analyzes early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.ResponsibilitiesIn this position, you will be responsible for server chipset test development. Your responsibilities will include but not be limited to: - Having close partnership with design and product development engineers to deliver Design-for-Test DFT solutions - Participating in DFT development like DFT architecture definition and test plans definition - Responsible for Verilog* and/or VHDL test bench creation and/or debug, test writing, Register Transfer Level RTL simulation, Gate Level Simulation GLS, analog simulation, performance validation, VTPSim* Verilog* test pattern simulator, silicon debug on tester or on other platform like system level - Developing highly optimized test vectors by using state-of-the-art vector conversion tool and methods - Developing, integrating and optimizing test program through characterization and other techniques - Developing or designing test hardware for example test interface unit - Managing silicon debug to check out all the structural and functional tests- Qualifying new products and performing detailed test program analysis to ensure product startup with low Defect per Million DPM, low test time, good yield and meeting other product health indicators before passing over to factory product engineering group for high volume manufacturing


Qualifications

Qualifications: Bachelor's deg in Electronics, Electrical, Microelectronics or Computer Engineering with 3.40 CGPA. Knowledge in C++*, Perl*, VHDL*, Verilog*, digital logic, CMOS and hardware design is preferred. You should also have good communication and leadership skills. Chipset integrated circuit testing and high volume manufacturing experience would be an added advantage.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

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