Develops preSilicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.
Candidate should be able to Validate/verify complex multi-million designs and lead a team of design verification engrs. Candidate should have good indepth understanding of OVM/UVM. Candidate should have prior experience in validating complex data path design. Understanding of PCIe/High speed IO is desirable. Candidate should have relevant experience of 10+ years. Candidate should have BE/MS degree from a reputed collegeInside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.