Candidate must possess a Master's Degree in VLSI or Electricals or equivalent with at least 4 years of experience in related field or a Bachelor's Degree in E&C or Electrical Engineering or equivalent with at least 6 or more years of experience or Diploma in E&C with at least 8 years of experience.
Preferred Experience: -Layout design of high speed Datapath or Register file or custom memory-Understanding of Layout design Convergence at Block/Section Level -Basic understanding of timing analysis is plus-Scripting knowledge is plus.
2-3 years of people manager experience.Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.