Intel is currently developing the Nervana Engine, an application specific integrated circuit (ASIC) that is custom-designed and optimized for deep learning. You will be a key part of a silicon design and verification team chartered with creating silicon IP and ASICs targeted at state of the art Deep Learning and Machine Learning algorithms. Your responsibilities include building verification infrastructure, testing digital logic at block and system level, and verification closure.
Thoroughly understand design specs and develop verification plans for various designs
Develop and maintain testbenches
Run directed and constrained-random verification tests
Be able to think through design corner cases and be able to write relevant cover points
Collaborate with digital design team to debug test cases and deliver functionally correct designs
Close coverage measures to identify verification holes and to show progress towards tape-out
Create programming sequences for lab characterization and ATE
BS in Electrical or Computer Engineering
8+ years of relevant experience in digital design and/or verification
3+ years of experience developing verification collateral in Verilog, System Verilog and UVM
Experience with Perl, Python, Unix scripting
Inside this Business Group
Intel Nervana, leveraging Intel’s world leading position in silicon innovation and proven history in creating the compute standards that power our world, is transforming Artificial Intelligence (AI). Harnessing silicon designed specifically for AI, end-to-end solutions that broadly span from the data center to the edge, and tools that enable customers to quickly deploy and scale up, Intel Nervana is inside AI and leading the next evolution of compute.