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Job ID: JR0033274
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type:

Board Design Engineer

Job Description

As a Board Design Engineer, you will use your high speed board design skills and signal integrity analysis experience to help Intel Programmable Solutions Group (PSG) achieve their goals. The responsibilities of this position include system level design, functional specifications, board design, high speed signal integrity analysis, generation of technical documentation, schematic capture, component selection, lab debug and characterization using various types of scopes and analyzers, and supporting Intel customers and Sales groups as necessary. The position requires experience with design of boards using high speed and analog PCB design skills. The responsibilities also include all aspects of board design including all electrical and mechanical design considerations.

Please be informed that Intel is proactively trying to find candidates for a position and that may, or may not, be available for all location(s) at this time. If you're interested in this position, we encourage you to apply, and our hiring team will be glad to contact you if/when relevant.

- Bachelors Degree in Electrical Engineering or related - 4 years of Hardware Board Design and/or FPGA design - Experience in high speed board design - Experience in Power/Clock design - Experience in Technical documentation, board debug, schematic capture, layout skills, ADDITIONAL (PREFERRED) QUALIFICATIONS • 8 years of Hardware/FPGA design and signal integrity analysis experience • Hardware Board Design and/or FPGA design with signal integrity analysis experience. • Experience with high speed oscilloscopes, BERT, pattern generators, spectrum analyzers, and network analyzers.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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