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Job ID: JR0032949
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations:
Job Type:

Verification Architect

Job Description

Intel Programmable Solutions Group (PSG) offers a large selection of integration of intellectual property IP cores optimized for Intel FPGA devices, all of which are developed for highest performance, lowest cost, ease of use and fastest time-to-market. The Programmable Hardware Engineering group is responsible for High performance FPGA Fabric and PCIE/Ethernet devices development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA emulation prototyping, validation and debugging. In this position, you will be assuming the leading role in Programmable Device Validation Architecture analysis, definitions and implementation of verification methodology that is re-usable and scalable across IP to FullChip level validation, improving quality through increased coverage at different level of validation including emulation, maximizing value and reuse of validation architectural solutions across the Intel FPGA product portfolios. Your specific responsibilities will include but not limited to the following:

-Provide technology leadership, technical direction setting and vision, in the areas of Programmable Device Verification & Validation Architecture and process, including emulation and prototyping

-Define Programmable Device validation architecture roadmap with engineering and key stakeholders, translate FPGA product requirements into validation coverage, test bench & emulation specifications and drive the relevant implementations

-Understand potential cross Intel product implications and complexities, communicate, influence and work with a wide audience in order to help driving the defined verification and validation architecture across the product portfolio to maximize Intel's FPGA overall usability, quality and competitiveness

-Identify key trends and emerging technologies that can enhance or impact the verification and validation architecture to maximize the value of Intel's FPGA Cores offering

-Global leadership is expected to support a culture of idea generation and proliferation

-Provide practical, innovative solutions to complex problems

Please be informed that Intel is proactively trying to find candidates for a position and that may, or may not, be available for all location(s) at this time. If you're interested in this position, we encourage you to apply, and our hiring team will be glad to contact you if/when relevant.



Qualifications
- Bachelors degree in EE, CE, CS, or related - 10 years of experience in SoC design/verification - Previous experience in a technical leadership role - Experience in validation & verification technology strategy development, from product definition to product launch - Experience with RTL verification - Experience with influencing cross functional partners and stake holders - Familiarity with Verilog, SystemVerilog, and/or VHDL - Familiarity with system level solutions for automotive and/or datacenter applications - Familiarity/knowledge in the areas of external memory interface protocols such as DRAM, SRAM, HBM, high-speed transceiver subsystems (i.e. PCIe, Ethernet, Interlaken, JESD, UPI) - Willing to travel ADDITIONAL (PREFERRED) QUALIFICATIONS - 15 years of experience in SoC Design/Verification - Post graduate degree in EE, CE, CS, or related - Familiarity with Perl, TCL, and shell scripts - Familiarity with FPGA


Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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