As part of the graphics DFX design/validation team, the candidate will be working closely with assigned unit owner providing design and execution support. He will have an opportunity to ramp-up on an assigned unit and contribute to the development of the same on 2 generation of projects which will be concurrently executed. His assignment can also include taking forward methodology improvement ideas including, study, development, data collection.
Inside this Business Group
The candidate will be part of graphics DFX design/validation team under Visual and Parallel Computing Group VPG responsible for design and proliferation of graphics cores which would eventually become part of Intel CPUs. The team is responsible for DFX design and validation activities related to 3D and / or media features of Intel's next generation graphics cores. Overall responsibilities include but are not limited to: RTL coding and validation of 3d / media unitsdevelopment or modifying test verification environmentsdevelopment of testplans, test writing and executionwork with structural design teams to ensure timing closure for the owned unitswork with validation and integration teams for debugs / fixes pre and post SiliconWorking knowledge of System Verilog/Verilog HDLKnowledge of scripting languages like shell scripting and PERLKnowledge of spyglass, ATPG tools and GLS etc will be plus
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.