Inside this Business Group
Candidate should possess a Bachelor or Master of Science degree in Computer / Electrical / Electronics Engineering with 1 to 3 years of experience. As a SoC Design Engineer, you will be responsible for RTL integration at SoC, RTL quality checks and releasesUnderstanding of SoC Design flows - from micro-architecture to structural design Hands on experience in RTL implementation, IP integration, RTL releases meeting the quality checks, which includes, Linting, CDC, synthesizability, constraints.Having experience in power aware design, UPF & multi-power domain checks will be of added advantage.Should be strong in Digital design basics, experience in System Verilog coding, user of standard ASIC EDA tools like VCS, Lint, CDC, DC, Spyglass, LEC, Fishtail, etc., and expert user in one or more toolsExpected to have very good scripting skills, Unix user expertise, Bug filing systems, etc.,A very good team player with interpersonal and communication skills.
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.