In this position, the selected PEY will develop and verify OpenCL IPs for compute acceleration. We are looking for PEY who are self-motivated and good team player. You will work with a team of experienced FPGA engineers, learn about the latest hottest data center applications and use state of the art FPGA hardware/tools to accelerate computing.
Responsibilities may be quite diverse in a technical nature and will vary significantly depending on the unique needs of the role, U.S. experience and education requirements. Job assignments may be for the summer or for short periods throughout the school year.
The responsibilities will include, but are not limited to the following:
- Development of exciting IPs in computational algorithms, libraries and application. The development involves implementing highly re-usable/flexible IPs in OpenCL/HLS high-level-synthesis tools and verifying IPs thoroughly in emulation/hardware.
- Responsible for IP integration and implementation of verification infrastructure. In the development cycle, you will implement IPs that accelerates data center applications. You will optimize the IPs for re-usability / flexibility / performance and power.
-Develop IPs using OpenCL / HLS in FPGA for Data Center applications-Optimize IPs with different optimization techniques including explore parallelism, pipelining, effective memory usage-Integrate IPs into application / verification platform-Implement verification infrastructure, include test vector creation, test regression and debug in both emulation and hardware platforms.
The ideal candidate should exhibit the following behavioral traits:
- Problem-solving, data analytical and methodological thinking.
- Eager to take on challenges and complete tasks within given timelines.
- Ability to multitask, self-motivated and be able to work independently.
- Written and verbal communication skills.
- Ability to work in a dynamic and team oriented environment.
Inside this Business Group
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.
- The suitable candidate must be pursuing a Master degree of Science in Computer Science, Computer Engineering, or Electrical Engineering.
- 3 months experience and fluent understanding of C, C++.
- 3 months experience with OpenCL and familiar with OpenCL optimization parallelism, pipelining, memory management, multi-thread.
- 3 months experience in linear algebra, compiler, machine learning algorithm.
- 3 months experience with heterogeneous computing, computer architecture, OpenVX, CUDA-Scripting in Python.
- 3 months experience with library development and FPGA/Embedded system is a plus.
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.