Responsibilities may be quite diverse of a nonexempt technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. Minimum Requirements: - Strong knowledge of ASIC/SoC design methodology, digital logic design. - Experience in coding with System Verilog, Verilog and scripting languages like Perl, Python, tcl, etc. - Familiar with block-level and hierarchical chip-level synthesis flows